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dc.contributor.authorPerez, Josep-
dc.contributor.authorCabarcas Jaramillo, Felipe-
dc.contributor.authorRamírez, Alex-
dc.contributor.authorBadía, Rosa Maria-
dc.contributor.authorLabarta, Jesús-
dc.date.accessioned2017-09-08T20:05:41Z-
dc.date.available2017-09-08T20:05:41Z-
dc.date.issued2009-
dc.identifier.citationBellens, P., Perez, J. M., Cabarcas, F., Ramirez, A.,Badia & Labarta, J., (2009). CellSs: Scheduling techniques to better exploit memory hierarchy. Scientific Programming, 17, 77–95.spa
dc.identifier.issn1058-9244-
dc.identifier.urihttp://hdl.handle.net/10495/8155-
dc.description.abstractABSTRACT: Cell Superscalar’s (CellSs) main goal is to provide a simple, flexible and easy programming approach for the Cell Broadband Engine (Cell/B.E.) that automatically exploits the inherent concurrency of the applications at a task level. The CellSs environment is based on a source-to-source compiler that translates annotated C or Fortran code and a runtime library tailored for the Cell/B.E. that takes care of the concurrent execution of the application. The first efforts for task scheduling in CellSs derived from very simple heuristics. This paper presents new scheduling techniques that have been developed for CellSs for the purpose of improving an application’s performance. Additionally, the design of a new scheduling algorithm is detailed and the algorithm evaluated. The CellSs scheduler takes an extension of the memory hierarchy for Cell/B.E. into account, with a cache memory shared between the SPEs. All new scheduling practices have been evaluated showing better behavior of our system.spa
dc.format.extent18spa
dc.format.mimetypeapplication/pdfspa
dc.language.isoengspa
dc.publisherJohn Wiley & Sonsspa
dc.type.hasversioninfo:eu-repo/semantics/publishedVersionspa
dc.rightsAtribución 2.5 Colombia (CC BY 2.5 CO)*
dc.rightsinfo:eu-repo/semantics/openAccessspa
dc.rights.urihttps://creativecommons.org/licenses/by/2.5/co/*
dc.subjectProgramación simple-
dc.subjectProgramación de tareas-
dc.titleCellSs : Scheduling techniques to better exploit memory hierarchyspa
dc.typeinfo:eu-repo/semantics/articlespa
dc.publisher.groupSistemas Embebidos e Inteligencia Computacional (SISTEMIC)spa
dc.identifier.doi10.3233/SPR-2009-0272-
oaire.versionhttp://purl.org/coar/version/c_970fb48d4fbd8a85spa
dc.rights.accessrightshttp://purl.org/coar/access_right/c_abf2spa
dc.identifier.eissn0187-5919-
oaire.citationtitleScientific Programmingspa
oaire.citationstartpage77spa
oaire.citationendpage95spa
oaire.citationvolume17spa
dc.rights.creativecommonshttps://creativecommons.org/licenses/by/4.0/spa
dc.publisher.placeEstados Unidosspa
dc.type.coarhttp://purl.org/coar/resource_type/c_2df8fbb1spa
dc.type.redcolhttps://purl.org/redcol/resource_type/ARTspa
dc.type.localArtículo de investigaciónspa
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